ROLE

SUMMARY

DURATION

HV Lead — Team Phantom SFU FSAE Electric

Jul 2025 - Feb 2026

ACCUMALTOR INDICATOR LIGHT

ACCUMALTOR INDICATOR LIGHT

INVERTER PRE-CHARGE BOARD

Made a board to pre-charge an FSAE Electric inverter to 93% system voltage to protect it's internal capacitors

High Voltage PCB Design

Schematic Capture

Trouble Shooting

High Voltage Testing

LTspice

Analog Electronics

  1. OVERVIEW

Designed a pre-charge control PCB to safely charge a FSAE electric vehicle inverter to 400V accumulator voltage during system startup. The circuit initially routes current through a pre-charge resistor to gradually charge the inverter’s internal capacitors, then switches to the full-voltage path once the inverter reaches 93% of accumulator voltage, preventing damaging inrush current during startup.

  1. CONSTRAINTS / REQUIREMENTS

  1. Designing around high voltage

  2. Implementing galvanic isolation

  1. DESIGN

3.1 CONCEPTUAL SYSTEM OVERVIEW

The tractive system consists of a pre-charge relay and resistor connected in series, with this branch connected in parallel with the main relay.


During system startup, the inverter, which converts the accumulator’s DC voltage into 3-phase AC for the motor, is charged through the pre-charge circuit. The inverter contains large internal capacitors for functions such as input and output filtering, which can be damaged by excessive inrush current. The pre-charge circuit therefore limits the initial current and gradually charges the capacitors to prevent damage.


To initiate pre-charge, the pre-charge relay is first closed, allowing current to flow through the pre-charge resistor and gradually charge the inverter's capacitors. Once the inverter voltage reaches 93% of the accumulator voltage, the main relay is closed, bypassing the pre-charge resistor and allowing full power to be delivered to the inverter. This prevents the pre-charge resistor from continuously dissipating power during normal operation.


Our pre-charge control board monitors the inverter voltage and detects when it reaches 93% or more of the accumulator voltage. It then sends a signal to close the main relay and complete the pre-charge sequence.


3.2 SCHEMATIC OVERVIEW

  • The circuit board reads voltage from before and after the main relay to get a reference for the accumulator and inverter voltages respectively

  • The voltages are compared using voltage dividers to "step down" voltages for the comparator's input range, and the divider ratios are configured such that the comparator will send a signal once the inverter voltage reaches 93% of the accumulator voltage, which is used as the comparator reference here and isn't changing during system pre-charge

  • The signal sent from the comparator then goes off-board to an additional safety shutdown circuit, not shown, which then closes the main relay

  • The comparator has high voltage nodes connected to it, and if any sort of fault were to occur, any low voltage signal or source connected to the comparator will also become high voltage

  • Thus we use an isolated DC-DC converter to galvanically isolate our low voltage source and an opto-coupler to galvanically isolate our comparator signal

3.3 OTHER SCHEMATIC DETAILS

Specific design details:

  • Both the accumulator and invertor inputs are sized with a 600VDC, 200mA current rating and 10kA interrupt rating fuses. The low voltage source input is also fused.

  • Comparator is open-collector and uses a pull-up

  • R1 of the voltage dividers is split into multiple resistors to spread voltage drop and power dissipation across multiple resistors, allowing us to use smaller resistors (1206) with lower power ratings. Formula with R1: link

  • The FSAE requirement was to close the main relay once the inverter reached at least 90% of accumulator voltage. I selected a 93% threshold to provide margin above the requirement while allowing me to use practical E-series resistor values for my configuration.

  • Multiple bypass capacitors are used on converter output for low ESR

  • Zener diodes are used on comparator input pins to clamp voltages if voltage approaches input voltage limit

3.4 PCB Design

Specific design details:

  • Accumulator voltage, inverter voltage and HVGND come onto the board on opposite pins of the header to maintain greater than 3mm clearance and slots are used to maintain 8mm creepage according to IEC 60664-1

  • Slots are also implemented for the optocoupler and isolated converter to maintain creepage

  • Probe touch points are used on outputs of dividers to measure voltage levels during testing

3.5 TESTING & DEBUGGING

  • Made a test plan to test the board

  • Tested the board with up to 400V

  • The board didn't work the 1st time we tested it. We debugged it and discovered the comparator wasn't soldered properly during assembly

  • We tested it a 2nd time and it didn't work again. We debugged the board by isolating sections and testing them individually and discovered that we ordered the wrong inductor value for the isolated converter

  • We tested it a 3rd time and didn't work again. We discovered that comparator voltage thresholds were incorrect and found that some of the resistors in the divider were the wrong value, maybe from damage.

  • We replaced the resistors and the board now works.

  1. ITERATIONS

4.1 ITERATION 1

  • The first revision of the board uses same board concept as current revision but doesn't account for isolation

  • Assembled the board and tested with 400V

  • Fatal and silly flaw with this board is that it didn't use the HV GND of the tractive system, accumulator and inverter GND, as the GND for those node voltages but it used the low voltage source as GND. This makes zero sense considering voltage is a potential difference and if the accumulator and inverter voltages aren't using their HV GNDs as a reference then their node voltages are meaningless with the LV GND as a reference.

  • Also another issue with this board is that the relay signal out of the comparator was not 12V since the signal went to a gate of an NMOS on another board making the output high impedance and the 12V actually seeing the LED voltage drop and the divider formed by the comparator pull-up and LED current limiting resistor

4.2 ITERATION 2

  • Fixed HV reference issue with previous revision

  • Added isolation, clearance and creepage